下載電子全文宣告This thesis is authorized to indicate not accessible
You can not download at the moment.
Your IP address is 184.108.40.206
The defense date of the thesis is 2011-02-11
The current date is 2019-04-24
URN etd-0211111-095458 Statistics This thesis had been viewed 1500 times. Download 0 times. Author Lung-yi Chi Author's Email Address No Public. Department Communication Engineering Year 2010 Semester 1 Degree Master Type of Document Master's Thesis Language zh-TW.Big5 Chinese Page Count 53 Title Implementation of a Four-Phase DC-DC Buck Converter with VRM12 Technology Keyword load line VRM12 muti-phase transient response transient response muti-phase VRM12 load line Abstract Following Intel platform update, a high current and low voltage DC to DC power converter were needed. In this thesis is applied on the power module of CPU on the motherboard. Combine Intel LGA1156 CPU and match VRM12 technology. Design and analyze the synchronous buck converter and realize a DC to DC converter having low-voltage high-current and low ripples. Utilize development VTT transient tool of Intel through interface and simulation CPU processor of the computer and its load line、transient response and dynamic voltage change temporarily.
Compared VRM11.1 and VRM12 with simulation tools to verify performance. Carry on over voltage protect、over current protect 、load line 、temperature compensation and current ripples to understand the advantage of VRM12.
Advisor Committee Ming-chieh Tsai - advisor
Files Date of Defense 2011-01-25 Date of Submission 2011-02-11