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The defense date of the thesis is 2006-06-19
The current date is 2017-11-21
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URN etd-0619106-175428 Statistics This thesis had been viewed 1609 times. Download 19 times. Author Hsiao-Ning Huang Author's Email Address No Public. Department Communication Engineering Year 2005 Semester 2 Degree Master Type of Document Master's Thesis Language English Page Count 120 Title A HIGH OSR VARIABLE CENTER FREQUENCY DELTA-SIGMA MODULATOR Keyword delta-sigma modulator delta-sigma modulator Abstract Although real world signals are analog, it is often desirable to convert them into the digital domain using an analog to digital converter (ADC). Some processing is only feasible in the digital domain such as intricate processing of the signal. In order to achieving the goal, one technique, delta-sigma modulator, has become quite-popular for high resolution.
Traditionally, many combinations of multiple center frequencies can be obtained by varying the order of the comb filters. However, the realistic fact that the comb filter order must be an integer value imposes a restriction in that not all center frequencies are attainable. The limitation can be overcome by another proposed DSP skill: embedding fractional delay filter to approximate the fractional delay within the modulator. We will use individual FIR and IIR methods to be a tool to represent approximation fractional delayer combined in the delta-sigma modulator. Thus Multi-band delta-sigma modulators whose noise-shaping spectrum center frequency can be located anywhere you want may be well suited for the simultaneous analog-to-digital conversion of multiple-tone signals.
Furthermore, the method demonstrates that the use of several kinds of delta-sigma modulator structures to choose the most suitable one to satisfy your design needs, and to prove the probability of the method.
Advisor Committee NONE - advisor
NONE - co-chair
NONE - co-chair
Files Date of Defense 2006-06-14 Date of Submission 2006-06-19