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Title page for etd-0727107-165920


URN etd-0727107-165920 Statistics This thesis had been viewed 1867 times. Download 26 times.
Author Chun-Hung Chen
Author's Email Address No Public.
Department Computer Science and Enginerring
Year 2006 Semester 2
Degree Master Type of Document Master's Thesis
Language English Page Count 42
Title A SOFT-CORE BASED RECONFIGURABLE MULTIPROCESSOR SYSTEM
Keyword
  • multiprocessor system
  • multi-core
  • soft-core
  • FPGA
  • reconfigurable
  • reconfigurable
  • FPGA
  • soft-core
  • multi-core
  • multiprocessor system
  • Abstract Multiprocessor System-on-a-Chip (MPSoC), developed from the previous uniprocessor SoC, becomes popular recently. Using soft-core as a processing unit of MPSoC has no restriction on the semiconductor fabrication process and is more flexible than using hard-core. To fit the demand of market, the production cycle of MPSoC is quite short and quick, hence, using reconfigurable chip has become more and more common. The hardware layout can be modified to adopt the different demands of applications by using reconfigurable chip. However, for multiprocessor system, it will cause a bottleneck of system performance when processors accessing memory through the system bus concurrently. In this thesis, a soft-core-based MPSoC is proposed, the re-layouted memory can be handled efficiently, and processors will be able to access memory concurrently. Moreover, the experimental results show that the proposed multiprocessor system, based on soft-core, can be reconfigured according to demands, and the system performance improvement can be achieved.
    Advisor Committee
  • Liang-Teh Lee - advisor
  • Chia-Ying Tseng - co-chair
  • Ge-Ming Chiu - co-chair
  • Files indicate in-campus access only
    Date of Defense 2007-06-27 Date of Submission 2007-07-27


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