||Multiprocessor System-on-a-Chip (MPSoC), developed from the previous uniprocessor SoC, becomes popular recently. Using soft-core as a processing unit of MPSoC has no restriction on the semiconductor fabrication process and is more flexible than using hard-core. To fit the demand of market, the production cycle of MPSoC is quite short and quick, hence, using reconfigurable chip has become more and more common. The hardware layout can be modified to adopt the different demands of applications by using reconfigurable chip. However, for multiprocessor system, it will cause a bottleneck of system performance when processors accessing memory through the system bus concurrently. In this thesis, a soft-core-based MPSoC is proposed, the re-layouted memory can be handled efficiently, and processors will be able to access memory concurrently. Moreover, the experimental results show that the proposed multiprocessor system, based on soft-core, can be reconfigured according to demands, and the system performance improvement can be achieved.