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Title page for etd-0730108-162447


URN etd-0730108-162447 Statistics This thesis had been viewed 2787 times. Download 1338 times.
Author Yen-Chih Chen
Author's Email Address No Public.
Department Computer Science and Enginerring
Year 2007 Semester 2
Degree Master Type of Document Master's Thesis
Language English Page Count 28
Title Design and Implementation of Multiprocessor System
on a Chip (MPSoC) Based on FPGA
Keyword
  • Multi-core
  • Soft-core
  • Multiprocessor
  • Nios II
  • FPGA
  • FPGA
  • Nios II
  • Multiprocessor
  • Soft-core
  • Multi-core
  • Abstract With the growing of multimedia codec types, the huge amount of produced computing can not be handled by a single processor now. Therefore, we hope that the programs which include many computations can be processed by multiprocessors. In addition, the core operated in embedded system platform also gradually becomes multiprocessor from a single processor.
    In the thesis, we design a four-processor system using NiosII soft-core and implement our MPSoC architecture (includes 4K I-cache, 1MB SRAM, 32MB SDRAM, 16MB
    Flash) and design the executable programs running in multiprocessor via hardwire Mutex element. We use the hardwire Mutex core to access the shared memory in the program. The implemented result shows that the quad-core system architecture that we proposed can execute the program concurrently at the same time.
    After the system is working, we evaluate and analyze the system performance by writing two programs in our four-core platform compared with one, two and three processors system. One of those declares a single variable and it accesses share data via a custom access order. The other case computes with array data type and accesses share data out of order. The result shows that the speedup without accessing order gets the higher increasing rate.
    Advisor Committee
  • Chia-Ying Tseng - advisor
  • Liang-Teh Lee - co-chair
  • Maw-Sheng Horng - co-chair
  • Files indicate in-campus access at 2 years and off-campus access at 2 years
    Date of Defense 2008-07-03 Date of Submission 2008-08-01


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