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Title page for etd-0802111-134727


URN etd-0802111-134727 Statistics This thesis had been viewed 1564 times. Download 0 times.
Author Chia-wei Hu
Author's Email Address No Public.
Department Electrical Engineering
Year 2010 Semester 2
Degree Master Type of Document Master's Thesis
Language zh-TW.Big5 Chinese Page Count 56
Title LOW DROPOUT REGULATOR WITH SLEW-RATE ENHANCEMENT CIRCUITS
Keyword
  • dc-dc convertor
  • push-pull output amplifier
  • Slew-Rate enhancement circuit
  • Low dropout regulator
  • Low dropout regulator
  • Slew-Rate enhancement circuit
  • push-pull output amplifier
  • dc-dc convertor
  • Abstract Low dropout linear regulators are often used in a variety of electronic products, especially in mobile system products as an important driver. To prolong the battery life, power efficiency of low dropout regulators can be improved by reducing the power consumption.
    This paper used push-pull output amplifier as a linear regulator. Push-pull output amplifier from the GmH and GmL is composed, because the output current is large, Time required to charge or discharge the large pass transistor gate capacitance is greatly reduced, to achieve high slew rate. And joined the slew rate enhancement circuit to increase the slew rate.
    The LDO used push-pull output amplifier which increase the slew rate and reduce the quiescent current by TSMC 0.35μm 2P4M CMOS process technology. The input voltage 3.3V and maximum output current of 100mA of the slew rate of less than 2us while load capacitance 470PF.
    Advisor Committee
  • Ming-Chieh Tsai - advisor
  • Yao-Fu Chan - advisor
  • Guan-Chyun Hsieh - co-chair
  • Files indicate not accessible
    Date of Defense 2011-07-21 Date of Submission 2011-08-02


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