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URN etd-0818109-150329 Statistics This thesis had been viewed 2886 times. Download 3024 times. Author Pei-Chun Hsu Author's Email Address email@example.com Department Electrical Engineering Year 2008 Semester 2 Degree Master Type of Document Master's Thesis Language zh-TW.Big5 Chinese Page Count 87 Title DESIGN AND IMPLEMENTATION OF
MEMORY-BASED VARIABLE LENGTH FFT
Keyword FFT FFT Abstract The FFT algorithms considered here include radix-2, radix-4,
radix-22 and, split-radix2/4, which is the subject of this study. We use
memory-based architecture to Design and implementation, and choose
the algorithm, radix-2. Then we improve it’s efficience with the radix-22
Taking the advantages of low hardware cost of memory based FFT
(MBFFT) architectures , this study improves the speed perfor- mance.
The improvement can be achieved by an efficient memory retrieval
scheme for reducing the control complexity and a clocksche- me. Instead
of using dual-port memory for data storage and retrieval, our design uses
The FFT processor has been implemented by using verilog and
ModelSim for circuit design and simulation, respectively.
Advisor Committee Yaw-Fu Jan - advisor
none - co-chair
none - co-chair
Files Date of Defense 2009-07-21 Date of Submission 2009-08-18