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Title page for etd-0824111-103952


URN etd-0824111-103952 Statistics This thesis had been viewed 1381 times. Download 4 times.
Author Chi-che Hung
Author's Email Address No Public.
Department Electrical Engineering
Year 2010 Semester 2
Degree Master Type of Document Master's Thesis
Language zh-TW.Big5 Chinese Page Count 80
Title Optimization of H.264 Video Compression Encoder Based on DSP Platform
Keyword
  • CCS
  • TI C6416DSK
  • DSP
  • H.264/MPEG-4
  • H.264/MPEG-4
  • DSP
  • TI C6416DSK
  • CCS
  • Abstract With the advancement of the digital signal processing, real-time video transmission becomes an essential element in our daily life. In this paper, a implementation and optimization scheme of H.264/MPEG-4 encoder based on TMS320C6416 DSP is presented.
    For the H.264 encoder, the open source code JM is used as the basis to build a DSP-executable program. We choose the Baseline Profile as our main research from the H.264 encoder architecture, and this profile offer the intra prediction, inter prediction, and the entropy coding adopts CAVLC.
    The hardware platform used is TI TMS320C6416 DSK, the main function is the digital signal processing depending on its special hardware module designed. The TMS320C6416 DSP operating at 1GHz, eight functional units, operating highest may reach 8000MIPS.
    The procedure of code immigration, how to optimize the algorithm by using TI CCS, using TI intrinsic setting functions, and writing the linear assembly code to optimize the system are discussed as follows. Furthermore, we use several DSP codes acceleration techniques including memory management, TI DSP intrinsic functions and others. Through the code modifications, we can reduce the computation by 4-11%.
    Advisor Committee
  • Teng-Pin Lin - advisor
  • none - co-chair
  • none - co-chair
  • Files indicate in-campus access only
    Date of Defense 2011-01-24 Date of Submission 2011-08-25


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