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Title page for etd-0905112-164201


URN etd-0905112-164201 Statistics This thesis had been viewed 1426 times. Download 0 times.
Author Wang-Hua Chang
Author's Email Address No Public.
Department Electrical Engineering
Year 2011 Semester 2
Degree Master Type of Document Master's Thesis
Language zh-TW.Big5 Chinese Page Count 52
Title DESIGN AND IMPLEMENTATION OF VARIABLE-LENGTH FAST FOURIER TRANSFORM PROCESSORS FOR MIMO OFDM SYSTEMS
Keyword
  • MIMO
  • FFT
  • radix-23
  • radix-23
  • FFT
  • MIMO
  • Abstract Orthogonal Frequency Division Multiplexing (OFDM) has already been widely applied to various kinds of wireless communication system. In the OFDM systems, Fast Fourier Transform (FFT) processor is a module requiring high processing complexity. In this thesis, we propose a 128/64 point Fast Fourier Transform processor for WLAN applications. The processor can support 1-4 data paths computation. We choose the multiple-path delay commutator (MDC) architecture to design and implement. To reduce computational complexity, we choose mixed-radix algorithms that contain radix-2, radix-23 algorithms. The FFT processor has been implemented by using Verilog HDL, MATLAB and ModelSim for circuit design and simulation, respectively.
    Advisor Committee
  • Yaw-Fu Jan - advisor
  • Kou-Cheng Hsu - co-chair
  • Shuenn-Shyang Wang - co-chair
  • Files indicate in-campus access at 5 years and off-campus not accessible
    Date of Defense 2012-07-30 Date of Submission 2012-09-06


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